CAD Synthesis Engineer

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SENIOR SILICON DESIGN ENGINEER

The Role

The focus of this role is to own group specific flow deployment for IP subsystems and SOC. This involves ownership of collaboration with CAD team as well as PD implementation team for synthesis, LEC, CLP, STA and PNR.

 

Key Responsibilities

• Responsible for physical implementation flow deployment for synthesis, LEC, CLP, STA and PNR
• Collaborate with central CAD team, DFX, EDA vendors and Design teams to achieve best PPA.
• Complete quality and bug free flow delivery for 2nm to 7nm.
• Debug and resolve technical issues in tools as well as flows
  
  
  

• Experienced in CAD based physical implementation work flows for synthesis, LEC, CLP, STA and PNR
• Good to have experience in automation using perl, tcl and python.
• Good communication skill for collaboration
• Understand RTL and DFT basics
  
  
  

• Bachelors with 5 years of experience or Masters degree with 3 years of experience in Electrical Engineering