Senior Engineer Design-RTL

The ICW-SoC Team is searching for a hands-on, team-oriented RTL Design. In this role, the engineer will be responsible for RTL Design of SoCs in which sub-systems/IPs are integrated. We are looking for a self-motivated and experienced engineer who can work with minimal supervision in our SoC team and be able to work closely with our global design teams.

Job Description

Responsibilities:

• RTL Design/Integration for IoT SoCs
• Work with digital/analog/RF IP teams to arrive IP configuration at SoC level
• Drive power topology at SoC level, clock structure and reset strategy
• Identify low power opportunities at SoC level
• Define power intent of SoC
• Arrive IO requirements/muxing
• Integration of sub-systems/IPs while considering sub-system/IP features/configurations/generics, power/clock/reset, standard/proprietary interface requirements
• Drive analysis of CDC, lint, low power reports.
• Deliver synthesis constraints at SoC level
• Participate, as applicable, silicon debug activities.
• Help, drive improvements on-the-fly (as project executes)
• Ensure an inclusive teamwork environment, inspire team members, and role model.
• Work effectively with several stakeholder teams globally.
  
  

Your Profile

Required Skills:

• B Tech or M Tech with experience of Digital design / VLSI
• Knowledge of System Verilog/VHDL languages
• Knowledge with scripting
• Team player with good communication skills.
• Strong analytical and problem-solving skills
• Familiarity with ARM based SOC architecture is a plus.
  
  

Contact:

Jyoti.vimal@Infineon.com

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