Low Power PTPX Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.

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MTS SILICON DESIGN ENGINEER 

 

The Role

As a member of the AECG Custom ASIC Group, you will help bring to life cutting-edge designs. As a member of the Power Delivery convergence team , you will work closely with the architecture, physical design teams, package, board, and product engineers to achieve first pass silicon success.

The Person

A successful candidate will work on full chip SoC low power convergence and power analysis. The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills.

Key Responsiblities

• Work closely with architecture, RTL, PD and power management teams for coming up with the chip low power intent and UPF.
• Work with architecture, RTL and PD team for chip level power estimation, analysis and optimization
• Work closely with CAD team to come up with new flows and methodologies in the power analyisis and low power domains.
  
  
  

• 8+ years of professional experience in the industry in low power and power estimation domains.
• Hands on experience on industry standard tools especially PTPX, Power Artitst, VCLP and CLP.
• Good in scripting languages such as Tcl and Perl
• Self driven, positive attitude and team worker
  
  
  

• Bachelors or Masters degree in computer engineering/Electrical Engineering