Digital Signal Processing Engineer

Role: Digital Signal Processing Engineer

Location: Ahmedabad, Gujarat, India (On-site)

Employment type: Full-time

Industry: Space Technology

About Catalyx Space:

We’re building AWS for space—providing in-space experiments and tech demos across LEO, deep space, and lunar orbit. Our offerings include unmanned labs, testbeds for rideshare and dedicated missions, and re-entry capsules for payload return. We simplify access with end-to-end solutions, no minimum mass limits, zero integration fees, and fast deployment (≤6 months), serving biopharma, semiconductors, materials science, defense, and more.

Role:

Design, implement, and optimize signal-processing algorithms and firmware for spacecraft communication systems (S-band/X-band). Work spans baseband processing, modulation/demodulation, coding, synchronization, and FPGA/SoC implementations, plus HW/SW integration and validation with GNU Radio and SDR platforms.

Key responsibilities:

• Design & implement DSP algorithms for modulation/demodulation, filtering, synchronization, FEC, and channel estimation.
• Build real-time signal-processing pipelines for SDR/FPGAs and embedded processors.
• Implement PHY algorithms (BPSK, QPSK, OQPSK, 8PSK, DVB-S2, etc.) in fixed-point / hardware-efficient forms.
• Use GNU Radio (and similar) for simulation, prototyping, and HIL validation.
• Integrate DSP modules with RF front-ends and transceivers (S-band, X-band).
• Co-design FPGA/SoC architectures with hardware/firmware teams.
• Run link simulations, BER analysis, and channel modeling for satcom links.
• Optimize chains for latency, throughput, and power in embedded environments.

Qualifications:

• B.E./B.Tech or M.E./M.Tech in Electronics/Electrical/Communications (or related).
• 2–6 years in DSP algorithm development for RF/wireless systems.
• Strong communications theory: modulation, coding, synchronization, spectral efficiency.
• Error-correction coding background (LDPC, Turbo, Reed–Solomon) and HW implementation.
• Experience with FMECA/worst-case analysis for DSP/FPGA subsystems.
• Hands-on FPGA DSP (VHDL/Verilog or HLS) and embedded MCUs.
• Proficiency in GNU Radio, MATLAB/Simulink, or Python for algorithm design/verification.
• Familiarity with SDR hardware platforms.
• Understanding of RF front-end traits (gain, NF, BW, I/Q balance, etc.).

Nice to have:

• DVB-S2/X, CCSDS, or related space comms protocols.
• RTOS or Linux driver development for SDR systems.
• Beamforming, MIMO, or adaptive modulation.
• Experience in satellite comms, CubeSat payloads, or ground-station SDRs.
• Co-simulation (MATLAB↔FPGA, GNU Radio↔SoC).

Compensation & benefits:

• Competitive salary (details will be shared with shortlisted candidates), 
• health insurance
• Provident fund.



How to apply:

Apply via Zoho Recruit: https://catalyxspace.zohorecruit.in/jobs/Careers/193193000000740154/Digital-Signal-Processing-Engineer?source=CareerSite

We only contact candidates from @catalyx.space emails. No fees are required at any stage of our hiring process.

Equal Opportunity: Catalyx Space is an equal opportunity employer and does not discriminate on any protected characteristic.