Staff Engineer II - Physical Design

The Opportunity

Were looking for the Wavemakers of tomorrow.

Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology.

What You’ll Do

• End-to-End ASIC Implementation
• Lead the physical implementation flow from RTL handoff and architectural definition to final GDS delivery.
• Collaborate with front-end designers to anticipate and resolve physical design challenges early in the design cycle.
• Floor planning & Power Planning
• Develop and optimize complex/unconventional floorplans, ensuring efficient placement, routing, and power distribution.
• Oversee power planning strategies to meet performance, power, and area (PPA) goals.
• Tool Expertise & Automation
• Use Synopsys tools (e.g., Fusion Compiler, IC Compiler, Design Compiler) to perform place-and-route, STA, and sign-off checks.
• Develop and maintain advanced TCL scripts to automate design flows, improve efficiency, and reduce turnaround time.
• Cross-Functional Collaboration
• Work closely with the architectural, front-end, verification, and operations teams to align on design objectives, schedules, and deliverables.
• Provide mentorship to junior team members and guide best practices in physical design methodologies.
• Technical Leadership & Project Management
• Serve as a subject matter expert on physical implementation strategies, offering guidance in design reviews and project planning.
• Identify potential design bottlenecks, propose solutions, and lead continuous process improvements.
  
  
  

• Education: Bachelor’s degree (or higher) in Electrical Engineering, Computer Engineering, or a related field.
• Experience: Minimum 10 years of hands-on ASIC physical design experience, including floorplanning, power planning, place-and-route, timing closure, and sign-off for advanced process nodes.
• Tool Proficiency: Expert-level knowledge of Synopsys design tools (e.g., Fusion Compiler, ICC2, Design Compiler), with a proven track record in successful tapeouts.
• Scripting Skills: Advanced TCL scripting skills to automate complex flows and enhance design productivity.
• Collaboration: Demonstrated ability to partner with cross-functional teams—designers, verification engineers, and program managers—to drive design success from concept to tapeout.
• Leadership: Prior experience leading or mentoring teams, with strong communication and organizational skills.
• Problem-Solving: Solid understanding of physical design challenges—especially in unconventional or cutting-edge architectures—and ability to propose innovative solutions.
  
  
  

• Competitive Compensation Package
• Restricted Stock Units (RSUs)
• Provisions to pursue advanced education from Premium Institute, eLearning content providers
• Medical Insurance and a cohort of Wellness Benefits
• Educational Assistance
• Advance Loan Assistance
• Office lunch & Snacks Facility