Senior Physical Design Engineer

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a highly motivated Senior SerDes Physical Implementation Engineer with a strong background in digital and physical design. You are passionate about working on advanced SerDes developments, including the latest 112G/224G PAM4 standards. With a solid engineering understanding of digital design, architecture, and implementation flows, you excel at driving projects from RTL to GDSII. You thrive in collaborative environments, working closely with multiple functional groups to achieve competitive PPA across multiple process nodes. Your excellent communication skills enable you to articulate complex concepts at various levels of abstraction, making you an invaluable team player. You are proficient in CAD tools and have a knack for scripting, which aids in automating various aspects of the design process. Your experience with advanced FinFET nodes and place-and-route tools ensures that you can handle the high-speed timing closure challenges in SerDes platforms effectively.

What You’ll Be Doing:

• Driving the physical implementation of high-speed interface IPs and test-chips from RTL to GDSII.
• Collaborating with front-end, analog, CAD, and product teams to ensure seamless integration and functionality.
• Focusing on high-speed timing closure in SerDes platforms.
• Conducting physical and timing sign-off to meet project specifications and deadlines.
• Utilizing place-and-route, synthesis, and timing analysis tools to optimize design performance.
• Implementing and verifying complex mixed-signal IPs across multiple process nodes.
  
  

The Impact You Will Have:

• Enhancing the physical implementation process for high-speed interface IPs, contributing to the overall efficiency and performance of the product.
• Ensuring the successful tape-out of projects, meeting critical timelines and quality standards.
• Collaborating with cross-functional teams to drive innovation and solve complex design challenges.
• Optimizing design performance through effective use of CAD tools and scripting automation.
• Contributing to the development of cutting-edge SerDes technologies, maintaining Synopsys leadership in the industry.
• Driving continuous improvement in design methodologies and processes, ensuring competitive PPA.
  
  

What You’ll Need:

• 2+ years of digital or physical design experience with recent contributions to project tape-outs.
• Good understanding of the full design cycle from RTL to GDSII.
• Experience with advanced FinFET nodes, TSMC 16 nanometer or below.
• Proficiency in place-and-route, synthesis, and timing analysis tools such as ICC2, Design Compiler, and PrimeTime.
• Experience with physical verification tools and flows, including ICV, Calibre for LVS, DRC, ERC, PERC, and Redhawk.
• Strong scripting skills in Make, Tcl, Python, and Perl.
  
  

Who You Are:

• An excellent communicator with the ability to convey complex concepts at different levels of abstraction.
• A team player who thrives in collaborative environments and works well with cross-functional teams.
• A problem-solver with a keen eye for detail and a strong analytical mindset.
• Highly motivated and passionate about driving innovation in the field of physical design.
• Adaptable and able to handle multiple tasks and projects simultaneously.
  
  

The Team You’ll Be A Part Of:

You will be part of the Mixed-Signal IP organization, a highly motivated team responsible for the physical implementation of complex mixed-signal IPs and test-chips. The team focuses on developing competitive PPA solutions across multiple process nodes, with a specific emphasis on high-speed timing closure in SerDes platforms. You will work closely with front-end, analog, CAD, and product teams to drive innovation and ensure the successful implementation of advanced SerDes technologies.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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