SoC Hardware Architect

Business Line Description

• NXP's MPU Engineering (ACE) team is a central engineering organization responsible for developing and delivering Systems-on-a-Chip (SoCs) for NXP's Automotive, Edge, and Radar Processing business lines. MME's SoC Hardware Architecture team produces architectural solutions covering the very wide-range of SoCs required by the business lines. The team is challenged to produce industry-leading solutions covering very cost-sensitive, low power devices to highly-integrated, high performance, multi-domain devices compliant with the latest automotive and industrial safety and security standards.
  
  

• Experience in architecting complex SoCs in leading-edge process nodes involving multiple processors, coherent/non-coherent interconnects, memory controllers, Ethernet interfaces, high bandwidth accelerators, high speed connectivity peripherals like PCIe etc
• Work with cross-functional architecture teams to develop holistic system-level SoC platform architectures targeting a specific product class or developing a specific technology solution which is scalable across a wide-range of product types and tiers.
• Deliver architecture specifications which include detailed system-level use-case definitions, hardware/software partitioning, alignment with existing industry standards, and relevant key performance indicators (KPIs).
• Collaborate with design and execution teams throughout the entire product development cycle to ensure your solution is successfully deployed in commercial product.
• Developing specifications for both internal and 3rd-party IP, participating in make v. buy analysis, and selecting the right IP.
  
  

• Experience in designing or architecting complex SoCs in leading-edge process nodes with multiple independent compute environments.
• Exposure to ISO26262-compliant and mixed-criticality architectures.
• Deep knowledge of ARM architecture specifications.
• Expertise in one or more the following technical areas: coherent and non-coherent interconnect, DDR memories, interconnect/system memory QoS, power & operating state management, PCIe, USB, networking, debug, boot, virtualization, machine-learning compute, or multimedia & pixel processing.
• Ability to work at the system-level, identifying optimal partitioning of solutions between hardware and software, working closely with software architects.
• Track record of assessing performance, power, and area tradeoffs and determining the correct balance for a given product type.
• Experience in defining IP components to solve system issues.
  
  

• Bachelor's in Electrical Engineering or other similar discipline with at least 15 years of relevant experience.
• Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science with 10 or more years of experience preferred.