Senior Lead Engineer - FCFP

Job Requirements

At Quest Global, it’s not just what we do but how and why we do it that makes us different. With over 25 years as an engineering services provider, we believe in the power of doing things differently to make the impossible possible. Our people are driven by the desire to make the world a better place—to make a positive difference that contributes to a brighter future. We bring together technologies and industries, alongside the contributions of diverse individuals who are empowered by an intentional workplace culture, to solve problems better and faster.

Role Summary

We are looking for a Sr. Technical Lead with strong expertise in Full Chip Floor Planning for complex SoC/ASIC designs. The candidate will be responsible for chip-level floorplanning, partitioning, power planning, congestion analysis, and physical design optimization across advanced technology nodes.

Key Responsibilities

• Lead full-chip floorplanning activities for complex SoC/ASIC designs.
• Define chip-level floorplan, macro placement, partitioning, and block integration strategies.
• Work closely with RTL, synthesis, CTS, routing, PD, EMIR, and package teams.
• Drive power planning, pin planning, and congestion optimization.
• Analyze and resolve timing, routability, IR drop, and utilization issues.
• Support package-aware floorplanning and hierarchical design implementation.
• Coordinate with cross-functional teams for design closure and signoff.
• Develop and improve floorplanning methodologies, flows, and automation.
• Mentor junior engineers and lead technical reviews.
• Participate in customer discussions and project planning activities.
  
  

Required Skills

• Strong expertise in Full Chip Floor Planning and physical design.
• Good understanding of complete ASIC/SoC physical design flow.
• Experience in macro placement, partitioning, power planning, and congestion analysis.
• Knowledge of timing closure, EMIR, signal integrity, and low-power design concepts.
• Hands-on experience with industry-standard EDA tools such as Innovus, ICC2, or Fusion Compiler.
• Scripting experience in Tcl, Perl, Python, or Shell.
• Strong analytical, debugging, and stakeholder management skills.
  
  

Qualification

• Bachelor’s/Master’s degree in Electronics/ECE/VLSI/Microelectronics or related field.
  
  

We are known for our extraordinary people who make the impossible possible every day. Questians are driven by hunger, humility, and aspiration. We believe that our company culture is the key to our ability to make a true difference in every industry we reach. Our teams regularly invest time and dedicated effort into internal culture work, ensuring that all voices are heard.

We wholeheartedly believe in the diversity of thought that comes with fostering a culture rooted in respect, where everyone belongs, is valued, and feels inspired to share their ideas. We know embracing our unique differences makes us better, and that solving the worlds hardest engineering problems requires diverse ideas, perspectives, and backgrounds. We shine the brightest when we tap into the many dimensions that thrive across over 21,000 difference-makers in our workplace.

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