Senior FPGA IP Design Engineer

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.

Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career.

The Role

The focus of this role is to plan, build, and execute the end-to-end processing system solution

 

THE PERSON: 

Looking for highly motivated and self-driven engineer

 

KEY RESPONSIBILITIES: 

• Will be responsible for planning and execution of end-to-end processing system solution including Vivado IP configuration to software execution targeting customer usecases on AMD Xilinx products
• Collaborate with marketing, architects, hardware engineers, pre/post silicon verification and firmware engineers to define specification and implementation of processing system solution requirements with agreed scope and timelines
• Work closely with your team and cross site stakeholders to drive the requirements and deliverables
• Interact with multiple teams across AMD to develop processing IP solution targeting AMD AECG FPGA/SoC/ACAP solution, including bare metal and OS hosted environments
  
  
  

• Self-driven, motivated, focused, results oriented individual with superior academic achievements
• Excellent communication skill for working remotely with global team
• Proficient knowledge of Verilog/system verilog coding, and simulation (Xilinx simulator, ModelSim, NC-Verilog, VCS etc.)
• Understanding FPGA basics, FPGA tools flow, using AMD Xilinx/AECG FPGAs, FPGA timing constraints, STA and timing closure
• Knowledge of system-level architecture including buses like AXI, bridges, memory controllers , High Speed serial connectivity, PCIe, Ethernet etc is a plus.
• Good understanding of processing system, boot and IO peripherals is preferable
• Good organizational skills with ability to multi-task, prioritize, and track many activities.
• Very good collaboration skills to interface with architecture, design and validation teams.
• Expertise in debugging systems on boards using debugger/scopes
• Ability to drive hardware/software solution projects at all stages from planning to implementation
• Familiar with Xilinx SDX tools to create software application is a plus
• Programming languages familiarity is a plus: C, Assembly, embedded applications programming
• Scripting: very good knowledge in Tcl/Python/PERL/C-Shell
• Understanding of GT Transceivers/SERDES is a plus
• Very good team player
  
  
  

• M.S/M.Tech/B.E/B.S/B.Tech in EE/ECE/CSE with at least 6+ years of experience in IP/Sub-system/System development and validation