DFX Design - Arch

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

The Role

As a member of the Computing & Graphics (CG) SoC Architecture team, you will develop and design silicon for client, discrete graphics, handheld gaming, gaming consoles, and related platforms. In this role, you will work with the lead SoC architect to define future architectures and contribute to product specifications, micro-architecture specifications, performance, and power trade-offs. The role will work from early concept development through the development phases to final production.

THE PERSON: 

In this role, you will collaborate with a network of expert architects and designers around the world where collaboration and communication skills are critical to the success of this role, and excellent organization skills are essential. You will approach sophisticated problems with a firm methodology and problem-solving technique and conduct experiments and analysis to formulate recommendations and next steps for other colleagues and SOC and IP design teams located in across multiple time zones and geographies. You will formally present your findings to co-workers, teams, and customer engineering teams.

Key Responsibilities

• Work on next-generation SOC debug solutions - enabling secure, robust bring-up and post-silicon debug
• Collaborate with technology, silicon validation, and product engineering teams to identify DFX strategy for both functional operating mode and manufacturing test mode
• Analyze DFX (Design-for-Test, Design-for-Debug) requirements with various AMD Engineering teams to align on use cases/needs and drive end-to-end flow definition
• Work with architects and SOC design team to define and document memory test architecture strategy, including:
• Repair analysis and fuse programming
• Power-aware and low-power test modes
• Work with architects and SOC design team to define SMS strategy, including:
• SOC reset, clock, and power domains
• JTAG / test access mechanisms
• Firmware-controlled repair and status reporting
• Work with architects and SOC design team to define scan strategy
  
  

• Minimum 7 years relevant experience in SOC design/DFX
• Solid understanding of SoC DFX construction in complex SOC designs
• Knowledge of DFT architectures including scan, ATPG, MBIST, JTAG/boundary scan and DFX features
• Knowledge of Synopsys STAR memory system (SMS) solutions for embedded memories (SRAM, register, files, ROM, etc.)
• Understanding of SOC clocking, reset, and power architectures
• Strong problem solving, organizational and communication skills, and ability to work in a dynamic and diverse environment
• Detailed thinking skills. Ability deal with novel problems from different perspectives and from different levels of abstraction
• Ability to analyze and understand sophisticated workflows and processes, and develop innovative ways in streamlining and automating
• Proficiency in scripting languages (Perl, TCL, Python) is highly preferred
  
  
  

• Bachelors or Masters degree in computer engineering/Electrical Engineering