PNR

Job Posted On

23-06-2026 22:26:34

Job Code

Job_304082

Experience Required

Location

• Chennai, Tamil Nadu, India (WAC_007)
• Bangalore, Karnataka, India (WAC_003)
• Kochi, Kerala, India (WAC_004)
  
  

• Perform full chip / block-level Physical Design (PNR) activities
• Work on floorplanning, placement, CTS (Clock Tree Synthesis), routing, and optimization
• Handle timing closure and congestion analysis
• Perform physical verification checks (DRC, LVS, IR drop, EM analysis)
• Collaborate with RTL, STA, and DFT teams for design convergence
• Work on low power techniques and multi-voltage designs
• Ensure design meets performance, power, and area (PPA) targets
  
  

• Strong experience in Place & Route (PNR) flow
• Hands-on with tools like Cadence Innovus / Synopsys ICC2
• Good knowledge of STA concepts
• Experience in advanced nodes (7nm / 5nm / 3nm is a plus)
• Understanding of physical verification (DRC/LVS)
• Scripting knowledge (TCL / Python) is an added advantage