Silicon Design Verification Manager II Camera ISP

Minimum qualifications:

• Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 10 years of experience with Camera ISP image processing or other multimedia IPs such as Display or Video Codec.
• 10 years of experience with System Verilog Assertions (SVA), assertion-based verification, and formal verification.
• 4 years of experience in people management, developing employees.
  
  

Preferred qualifications:

• Masters degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
• Experience in low-power design verification.
• Experience working with RTL design and integration teams on methodologies that improve team productivity and velocity.
• Experience working with software teams to define hardware/software interfacing including control/status registers, security, and error handling.
  
  

About The Job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Googles direct-to-consumer products. Youll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Googles mission is to organize the worlds information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make peoples lives better through technology.

Responsibilities

• Lead a team of individuals; set and communicate individual and team priorities that support organizational goals. Meet regularly with individuals to discuss performance and development, and provide feedback and coaching.
• Work cross-functionally to debug failures and verify the functional correctness of the design.
• Provide test plans, including verification strategy, environment, components, stimulus, checks, and coverage, and ensure documentation is easy to use.
• Plan the verification of complex Camera ISP hardware IPs at subsystem and full chip level by fully understanding the design specification and interacting with architecture and design engineers to identify important verification scenarios.
• Create and enhance constrained-random verification environments using System Verilog and UVM.
  
  
  

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Googles EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .

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