Director Principal Engineer Physical Design

About Us

Mythic has developed a unified hardware and software platform featuring its unique Mythic Analog Compute Engine (Mythic ACE™) to deliver revolutionary power, cost, and performance that shatters digital barriers preventing AI innovation at the edge. Mythics unique technology makes it much easier and more affordable to deploy powerful AI solutions, from the data center to the edge device. The company has raised over USD 125M in a recent funding round and has offices in Palo Alto (CA, USA), Austin (TX, USA), and Bangalore (Karnataka, India).

About This Role

Mythic is a fast-paced startup looking for individuals who enjoy broad, flexible roles. We are looking for a hands-on Principal Physical Design Engineer to serve as the technical leader of Physical Design in our India design center. This role is critical to delivering first-silicon success of advanced-node, chiplet-based AI SoCs, with a strong emphasis on analog IP integration and 3D stacking.

You will work closely with the US architecture, design, and manufacturing teams, define PD methodologies, and mentor an India-based PD team in a fast-paced startup environment.

Here Is What You Will Do

• Own block-to-full-chip Physical Design for both mature-node (28nm+) and advanced-node SoCs (12nm/7nm and below).
• Drive floorplanning, timing, power, and signoff closure.
• Lead integration of analog and mixed-signal IPs, ensuring noise isolation, power integrity, and robust digital-analog coexistence.
• Support chiplet-based and 3D designs, potentially including interposer-based integration.
• Collaborate closely with US-based architecture, RTL, packaging, and foundry teams.
• Define and enforce PD methodologies, quality bars, and tapeout readiness.
• Mentor senior- and mid-level PD engineers and help scale the local organization.
  
  

Here Is The Background We Hope You Have

• 15+ years of hands-on Physical Design experience on complex SoCs.
• Multiple successful advanced-node tape-outs (≤12nm).
• Strong expertise in:
• Floor planning, placement, CTS, routing, optimization
• STA (MCMM, SI, AOCV/POCV)
• Power integrity (IR/EM), noise, and thermal considerations
• Proven experience integrating analog/mixed-signal IPs in large digital designs.
• Working knowledge of 3D IC concepts, chiplets, interposers, and high-bandwidth die-to-die interfaces.
• Hands-on production experience with one or more industry-standard EDA tools, including:
• Cadence: Innovus, Tempus, Voltus, Quantus
• Synopsys: ICC2, PrimeTime, Fusion Compiler, StarRC
• Siemens EDA (Mentor): Calibre (DRC/LVS)
• Strong familiarity with foundry PDKs and sign-off flows at advanced nodes
• Willing to be both strategic and hands-on as needed.
• Able to influence early architectural decisions with physical design insight.
• Strong communicator across time zones and cultures with an ability to lead and manage a high-performing team of junior to mid-level PD engineers.
  
  

The following would be nice to have, but is not required:

• Experience with AI accelerators, HPC, or memory-centric SoCs.
• Direct exposure to chiplet-based designs and UCIe-style interfaces.
• Foundry interaction experience (TSMC/Samsung/Intel).
  
  

At Mythic, we pride ourselves in creating a culture where all employees feel valued and appreciated for the diverse perspectives and backgrounds they bring to the team. We aim to hire smart people, give them the resources they need to do their job well, and then leave the rest up to them. We celebrate individual differences and encourage people to be comfortable bringing their authentic selves to work. At the end of the day, we are committed to building a diverse workforce where everyone belongs.

Mythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.

We look forward to reviewing your application!

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