Engineering Manager 2

Division: RMI Engineering

Employment Status: Exempt

Salary Grade: 111

Shift

Requisition ID: 77301

Please be aware that if you are selected to formally interview for an internal position you will be required to notify your current manager. Please refer to the Employee Transfers Guidelines posted on Skylink.

About The Role

We are seeking an experienced Engineering Manager 2 to lead a multidisciplinary team spanning IC design, functional verification, and silicon validation. This role will drive end-to-end execution of complex SoC/ASIC programs, ensuring high-quality silicon delivery, first-pass success, and alignment with business objectives. The ideal candidate combines deep technical expertise with strong leadership, execution discipline, and a proven track record of delivering high-performance silicon products.

Responsibilities

Technical Leadership

Own end-to-end IC/SoC development from architecture through digital design, verification, tape-out, and post-silicon validation. Define and drive cross-functional methodologies, verification strategies, and validation frameworks. Ensure microarchitecture aligns with system requirements, PPA (performance, power, area), and product goals. Oversee coverage closure, design quality, and silicon readiness through customer sampling.

Execution & Delivery

Manage multiple concurrent tape-outs with a focus on predictable, on-time delivery. Drive first-pass silicon success through robust verification and validation strategies. Handle technical risks, debug complexity, and schedule trade-offs effectively. Oversee silicon bring-up, debug, and production ramp.

Team Leadership

Lead and scale teams across digital design, verification, and validation. Mentor both junior engineers and senior technical leaders, fostering development of next-generation talent. Build a high-performance culture centered on accountability, quality, and innovation. Own hiring, workforce planning, and performance management.

Cross-Functional Collaboration

Partner with architecture, IC design, firmware, software, systems, and product management teams to ensure alignment. Collaborate closely with test, physical design, and manufacturing teams to achieve successful tape-outs. Engage with customers and external partners for technical alignment and issue resolution.

Process & Innovation

Establish best-in-class design, verification, and validation flows. Drive automation across AI, CI/CD, regression, and debug analytics to improve productivity and efficiency. Evaluate and implement new tools, methodologies, and emulation/prototyping platforms. Promote adoption of AI/ML-driven verification and debug techniques.

Required Experience And Skills

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field (PhD preferred)
• 15+ years of experience in IC/SoC development with strong background in IC design, verification, and validation
• 5+ years of experience in engineering leadership or management roles
• Proven track record of delivering complex SoCs through full lifecycle (architecture → silicon → production)
• Deep expertise in SystemVerilog/Verilog, UVM-based verification, and silicon validation
• Strong understanding of SoC architectures, buses (AXI/AHB/APB), and industry protocols (PCIe, DDR, Ethernet, etc.)
  
  

• Hands-on experience with emulation (Palladium, Veloce) and FPGA prototyping
• Expertise in formal verification and low-power design techniques
• Experience working with geographically distributed teams
• Experience in domains such as AI/ML accelerators, networking, or high-performance computing