DSP Power Design Engineer

Company

Qualcomm India Private Limited

Job Area

Engineering Group, Engineering Group > Hardware Engineering

General Summary

Creating power spec for Qualcomm DSP IPs based on the design spec

Power intent development using UPF for DSP IPs based on power spec

Power intent validation at RTL level , Gate level (synthesis , PD ) using CLP

Fixing power intent based on PA DV feedback for any issue related to power intent

Debugging issues related to MV cell insertion during synthesis and modifying UPF accordingly

Dynamic and Leakage power projection of DSP IPs during starting of the project

Dynamic and Leakage power no. generation using PTPX and tracking the same at different stages of implementation flow

Highlighting issues related to dynamic and leakage power mismatch compared to the target and working with Synthesis and PD teams to fix the issues

Working with cross function teams (SOC, Sub System etc) for smooth handoff of power intent and Dynamic & leakage power no. at different stages of project execution

Minimum Qualifications

• Bachelors degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
  
  
  

OR

Masters degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

OR

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

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