Design Verification Lead

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SMTS Silicon Design Engineer

The Role

The Core design and verification team is responsible for development of ‘High performance and Ultralow power x86 microprocessor core’. The role provides a unique opportunity to work at the micro-architectural level of the next-gen Core, with exposure to designs that defines the next wave of client (laptops/ultra-books/think-clients) and custom designs. The multi-billion gate complexity and high-frequency (GHz) design development gives the learning experience of the latest and greatest design and verification methodologies, using cutting edge advanced technology nodes.

The Person

Candidates should have solid track record of working on complex SoC designs with hands on experience on Post silicon Vaidation, System level Debug, Driving cross functional task forces. solid understanding of X86 architecture, power management concepts, Design verification methodologies.

Key Responsiblities

• Own Post silicon validation of core power management functionality
• Architecting test plans, test content generation and silicon validation execution
• co-ordniate with cross functional teams for validation planning for cross team functionality and drive the validation closure
• Drive Silicon debugs across different functional teams and work with RTL/Design verification teams to root cause, escape analysis, help improve pre-si verification strength
• lead Program/project execution for Silicon/Pre-Si verification activities for Power managment function
  
  
  

• 15yrs of experience in complex SoC Pre-Si/Post Silicon verification
• Strong understanding the design and verification life cycle.
• Strong system debug capabilities and hands on experience of Debug tools and methodologies like JTAG, Scan dump
• Experience with x86, ARM or any other industry standard microprocessor architecture and ACPI standards.
• Experience in clocking, reset, power-up sequences and power management verification.
• Understanding of low power design verification techniques is a plus.
• exposure to Emulation, Power aware verification methodologies is a plus
  
  
  

• Bachelor or Masters Degree in Electronics/Computer Engineering