Design Verification Engineer

About TylSemi, Inc.

The Opportunity

The AI infrastructure market is exploding. Every hyperscaler, every cloud provider, every AI company is building custom silicon. But they all face the same problem: how do you connect hundreds of chips, deliver clean power at scale, and move terabits of data without melting the package?

Thats what we solve. TylSemi builds the chiplet infrastructure IP — the IO, power delivery, and interconnect building blocks — that makes AI/HPC systems actually work at scale.

This isnt a nice-to-have. Its the critical path.

Why Now

The Market Window

The semiconductor industry is going through its biggest architectural shift in 40 years:

• Moores Law is dead. 2nm and beyond delivers marginal performance gains. The future is chiplets, not monolithic dies.
• Custom silicon is now mainstream. Google, Microsoft, Amazon, Meta, OpenAI — theyre all designing their own ASICs. The $50B custom silicon market is growing 30% annually.
• IO and power are the bottleneck. Solve hard problems and provide something which is a category in itself.
  
  

Translation: Were entering the market at exactly the moment when every major AI/HPC player needs what were building, and their alternatives are disappearing.

Culture & Team: How We Work

No Politics, No Bureaucracy

There are no layers, no approval chains, no corporate theater.

• If you have an idea, we test it. If it works, we ship it.
• No endless meetings, no PowerPoint presentations to convince middle management.
  
  

Remote-Friendly, Global Team

• US team: Bay Area preferred, but we hire the best people regardless of location
• India team: Building a world-class design center in Bangalore
  
  

Move Fast, Ship Real Products

Were not a research project. We have paying customers, committed capital, and aggressive timelines.

This is a company, not a lifestyle business. Were building to win.

What We Value

• Ownership mindset. Youre not here to execute someone elses roadmap. Youre here to define it.
• Bias for action. We move fast. Analysis paralysis doesnt fly here.
• Deep technical expertise. This is hard engineering. We need people whove shipped real silicon and debugged real hardware.
• Low ego, high standards. We dont care about titles or politics. We care about results.
  
  

The Ask

If youre reading this, youre probably comfortable. You have a good job at a stable company with all the benefits.

Were asking you to walk away from that and bet on us.

Heres Why You Should

• The market is real. AI infrastructure spending is $200B+ annually and growing 40% YoY. Every hyperscaler needs what were building.
• The team has done this before. Weve built and exited semiconductor companies at scale. This isnt our first rodeo.
• The traction is de-risked. We have LOIs, strategic investors, and a clear path to revenue.
• The work is consequential. Youre not optimizing someones ad click-through rate. Youre building the silicon infrastructure that powers AI.
  
  

This is the bet. Join us and build something that matters.

Or stay comfortable. No judgment.

But if youre the kind of person who wants to take the shot, wed love to talk.

READY TO JOIN?

Role Overview

TylSemi Solutions Private Limited is looking for a motivated and detail-oriented Design Verification Engineer to join our growing Verification team. In this role, you will contribute to the verification of cutting-edge SoCs and IPs targeting AI, HPC, and Networking applications. You will work closely with experienced verification engineers and architects to develop testbenches, create test scenarios, analyze coverage, and help ensure high-quality silicon delivery.

This is an excellent opportunity for engineers who are passionate about digital design, verification methodologies, and next-generation semiconductor technologies.

What Youll Do

• Develop and execute verification test plans for IPs, subsystems, and SoC components.
• Create and maintain SystemVerilog/UVM-based verification environments.
• Write directed and constrained-random test cases to validate design functionality.
• Develop functional coverage models and assist in coverage closure activities.
• Debug simulation failures and collaborate with design engineers to resolve issues.
• Write assertions (SVA) to improve design checking and verification quality.
• Participate in regression execution, result analysis, and reporting.
• Support IP integration and subsystem-level verification activities.
• Learn and apply industry-standard verification methodologies and best practices.
• Contribute to automation scripts for regression, reporting, and verification productivity.
• Work closely with Design, Architecture, and Software teams to understand requirements and verify functionality.
  
  

What Were Looking For

• Bachelors or Masters degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or related field.
• 2–7 years of experience in Design Verification or Digital Design.
• Strong understanding of digital design fundamentals and computer architecture.
• Knowledge of:
• Verilog/SystemVerilog
• UVM methodology
• Simulation and debugging concepts
• Functional and code coverage
• Basic scripting (Python, Perl, Shell, or TCL)
• Familiarity with verification tools from Synopsys, Cadence, or Siemens EDA.
• Understanding of common bus protocols such as AXI, APB, AHB, PCIe, or Ethernet is a plus.
• Good analytical and debugging skills.
• Strong communication and teamwork abilities.
  

Preferred Qualifications

• Internship or academic project experience in ASIC/SoC verification.
• Exposure to SystemVerilog assertions (SVA).
• Knowledge of constrained-random verification techniques.
• Experience with Python-based automation.
• Understanding of AI, HPC, or Networking architectures is a plus.
• Familiarity with Git or other version-control systems.
  
  

Key Attributes

• Strong learning mindset and curiosity about semiconductor technologies.
• Attention to detail and commitment to quality.
• Problem-solving attitude with a willingness to learn from challenges.
• Ability to work effectively in a collaborative environment.
• Passion for innovation, automation, and continuous improvement.

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